The invention relates to direct memory access WMA) engines, broadly, and more particularly, the invention relates to a DMA engine capable of supporting a large number of outstanding messages and detection of message completion in a parallel multi-computer system in which there is a DMA engine.
Direct memory access (DMA) allows certain hardware sub-systems within a computer system to access system memory for reading and/or writing that is independent of the central processing unit, or compute nodes comprising processor(s) in the case of parallel computer system. A DMA transfer comprises copying a block of memory (data) from one device to another within a computer or computer system, i.e., from system RAM to or from a buffer on the DMA device w/o interrupting the processor, which is quite important to high-performance embedded systems. The CPU initiates the DMA transfer, but the DMA carries out the task. DMA use is made by disk drive controllers, graphics cards, network cards, sound cards and like devices.
What are known in the art as “third party” DMAs, for example, as used in conjunction with conventional ISA bus operation, are DMA engines or controllers that are normally part of the motherboard chipset for performing the DMA data transfers. Computer systems that employ DMAs, and DMA message passing can transfer data to and from system devices with much less CPU overhead than computer systems constructed to message and pass data without a DMA engine or channel.